Silicon Photonic Transceivers for Energy-Efficient Data Center Interconnects
Abstract
Silicon photonic transceivers are becoming accepted as an important technology in fulfilling the growing bandwidth and energy efficiency needs of current data centers interconnects. Traditional electrically-based interconnects cannot be scaled because of density of bandwidth, latency, and power, whereas silicon photonics offers CMOS-style integration, small form factors, and high throughput. The given paper is that of designing and analyzing silicon photonic transceivers with heterogeneous integration, more sophisticated 3D integration and gate-bias tuning of silicon photonic transceivers in order to perform energy-saving wavelength-division multiplexing. Experimental characterization demonstrates insertion losses between 3.2–4.5 dB, extinction ratios of 6.5–5.7 dB, and bit error rates below 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−12</sup>, with energy efficiency reaching 0.7 pJ/bit at 400 Gbps per channel. These findings confirm the possibility of electronics-photonic co-design and co-packaging solutions to be deployed in the hyperscale data centers in a scaleable manner. Also noted in the research is the challenge in the study in the area of waveguide losses, laser integration, and packaging, and future directions in the area of providing terabit-sized interconnects and a computing machine called exascale.