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Article

State-of-the-art in Heterogeneous Computing

André R. BrodtkorbSINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, NorwayChristopher DykenSINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, NorwayTrond Runar HagenSINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, NorwayJon M. HjelmervikSINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, NorwayOlaf O. StoraasliOak Ridge National Laboratory, Future Technologies Group, Oak Ridge, TN, USA
2010en
ABI

Abstract

Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.

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Cited by 20 references