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Works citing this work
1 works
Analysis of Dynamic Domino Logic Gate Performance Using Body Bias Techniques in Sub-Micron VLSI
Ravi Kumar M
,
K. M. Pimple
,
Prabhakaran K
+3
Article
Low-power high-performance VLSI design
2025
0 citations
ABI
ABI:AkademIndex/openalex/2025.article.019326