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Sequential circuit design using synthesis and optimization

Ellen SentovichDept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USAK.J. SinghDepartment of Electrical Enginieering ancl Computer Science, University of California, Berkeley, CA, USACho W. MoonDepartment of Electrical Enginieering ancl Computer Science, University of California, Berkeley, CA, USAH. SavojDepartment of Electrical Enginieering ancl Computer Science, University of California, Berkeley, CA, USARobert K. BraytonDepartment of Electrical Enginieering ancl Computer Science, University of California, Berkeley, CA, USAAlberto Sangiovanni‐VincentelliDepartment of Electrical Enginieering ancl Computer Science, University of California, Berkeley, CA, USA
2003en
ABI

Аннотация

A description is given of SIS, an interactive tool for synthesis and optimization of sequential circuits. Given a state transition table or a logic-level description of a sequential circuit, SIS produces an optimized net-list in the target technology while preserving the sequential input-output behavior. Many different programs and algorithms have been integrated into SIS, allowing the user to choose among a variety of techniques at each stage of the process. It is built on top of MISII and includes all (combinational) optimization techniques therein as well as many enhancements. SIS serves as both a framework within which various algorithms can be tested and compared and as a tool for automatic synthesis and optimization of sequential circuits.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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