Low-Power Silicon Photonic Modulator for On-Chip Optical Interconnects

The increasing demand for high-speed and energy efficient data transfer in modern computing systems has driven the adoption of optical interconnects as an alternative to conventional electronic links. In this work, we present a low-power silicon photonic modulator specifically designed for on-chip optical interconnect applications. The proposed device employs a compact Mach–Zehnder interferometer with PN-depletion phase shifters, optimized to achieve a low V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">π</inf>L product, reduced insertion loss, and high extinction ratio. Through simulations and preliminary measurements, the design demonstrates operation up to 100Gb/s with an energy consumption of less than 0.35pJ/bit, outperforming traditional electronic and photonic baselines. There are also results which demonstrate excellence in bit error rate (BER) operation in forward error correction (FEC) thresholds and better thermal stability than is desired in large-scale integration. This confirms the applicability of the proposed modulator to making it possible to provide scalable, low-latency, and power-effective optical interconnects to next-generation high-performance computing and data center architectures.

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