Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET
Sunil RathoreVLSI Design and Nano-scale Computational Lab, Electronics and Communication Engineering Department, PDPM-IIITDM, 482005, IndiaRajeewa Kumar JaisawalVLSI Design and Nano-scale Computational Lab, Electronics and Communication Engineering Department, PDPM-IIITDM, 482005, IndiaP. N. KondekarVLSI Design and Nano-scale Computational Lab, Electronics and Communication Engineering Department, PDPM-IIITDM, 482005, IndiaNavjeet BaggaIndian Institute of Technology Bhubaneswar, Odisha, India
2022en
ABI
Аннотация
Аннотация мавжуд эмас.
Идентификаторлар
Иқтибослар ва манбалар
2 та иқтибос0 та фойдаланилган манба