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Иш: Novel Methods for Synthesizing Self-Checking Combinational Circuits by Means of Boolean Signal Correction and Polynomial Codes
Self‐Checking Combinational Circuits with UnidirectionallyIndependent Outputs
A. Morosow, V.V. Saposhnikov, V.V. Saposhnikov +1
Мақола199810 иқтибосABIHidden Fault Analysis of FPGA Projects for Critical Applications
Oleksandr Drozd, Ihor Perebeinos, Oleksandr Martynyuk +3
Мақола20208 иқтибосABISelf‐checking Synchronous FSM Network Design with Low Overhead
A. Matrosova, Ilya Levin, S. Ostanin
Мақола19998 иқтибосABISequential circuit design using synthesis and optimization
Ellen Sentovich, K.J. Singh, Cho W. Moon +3
Мақола20036 иқтибосABIChecking Combinational Circuits by the Method of Logic Complement
M. Goessel, Alexandre V. Morozov, Vladimir Sapozhnikov +1
Мақола20054 иқтибосABINew self-checking circuits by use of Berger-codes
Alexandre V. Morozov, V.V. Saposhnikov, V.V. Saposhnikov +1
Мақола20023 иқтибосABIScheme for periodical concurrent fault detection in parallel CRC circuits
Jie Li, Shanshan Liu, Pedro Reviriego +2
Мақола20192 иқтибосABI