An optimised approach to detect and prevent hardware trojan in FPGA using machine learning approach

Field Programmable Gate Arrays (FPGAs) are widely used in embedded systems, including defense, automotive, healthcare, and the Internet of Things (IoT), to enhance computational performance and energy efficiency. However, FPGA security has become a critical concern, particularly due to the potential insertion of Hardware Trojan Horses (HTHs) in unoccupied spaces, leading to hardware failures and information leakage. This research introduces an Optimized Approach to Detect and Prevent Hardware Trojans in FPGA using Machine Learning. The proposed Revolutionary Preventative Approach secures FPGA designs by filling unused spaces with Look-Up Tables (LUTs) and Flip-Flops (FFs), mitigating the risk of Trojan insertion. Additionally, shift registers and gate chains are strategically embedded to establish security checkpoints, effectively preventing checkpoint and side-channel attacks. To enhance Trojan detection, a Unique Ensemble Model integrates Extreme Gradient Boosting (XGBoost) with Random Forest (RF), improving detection accuracy without compromising performance. This hybrid approach efficiently identifies unknown Trojans, eliminating hidden vulnerabilities in FPGA designs. Experimental results demonstrate that the proposed system not only enhances FPGA security by occupying unused resources but also achieves a high detection accuracy of 98%. This innovative framework ensures trust in FPGA-based applications, making it a reliable solution against hardware Trojans.

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