Post-Quantum Public-Key Cryptography Scheme for Secure Internet of Things-Based Edge Consumer Electronics Device

In the basic operations of the GGH-based post-quantum public-key cryptography scheme, polynomial multiplication consumes a large amount of time in edge-based consumer electronics devices (ECED). To improve the actual computational performance, this paper aims to design a fast and efficient polynomial multiplication architecture for lattice-based cryptography in IoT applications. Specifically, the objective is to develop a number-theoretic transform algorithm optimized for CRYSTALS-Kyber that reduces modular operations, supports high parallelism, and eliminates memory conflicts. To this end, we propose a 2n-th root pre-processing fast number-theoretic transform algorithm tailored for IoT-based edge devices. This architecture utilizes parallel processing of small-digit NTT operations and low-complexity calculation forms to reduce computation time. After combining the characteristics of the algorithm, the overall computational architecture determines a design model with 32 parallel channels. Based on this, a unified computational unit matching this architecture and storage units with non-conflicting data read/write and optimal address allocation were designed. Experimental results show that under the 65 nm complementary metal-oxide-semiconductor (CMOS) technology, polynomial multiplication operations with 256 terms and a modulus of 3,329 can be completed in 97 ns, consuming 108 cycles. The highest operating frequency can reach 1.1 GHz, with an area-time product of 20.7 (kGE × μs).

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