Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches
Costin-Emanuel VasileDepartment of Electronic Devices, Circuits and Architectures, National University of Science and Technology Politehnica Bucharest, 060042 Bucharest, RomaniaA. UlmameiDepartment of Electronic Devices, Circuits and Architectures, National University of Science and Technology Politehnica Bucharest, 060042 Bucharest, RomaniaCălin BîrăDepartment of Electronic Devices, Circuits and Architectures, National University of Science and Technology Politehnica Bucharest, 060042 Bucharest, Romania
2024en
ABI
Annotatsiya
This review provides an in-depth analysis of current hardware acceleration approaches for image processing and neural network inference, focusing on key operations involved in these applications and the hardware platforms used to deploy them. We examine various solutions, including traditional CPU-GPU systems, custom ASIC designs, and FPGA implementations, while also considering emerging low-power, resource-constrained devices.
Hali tarjima qilinmagan
Identifikatorlar
Iqtiboslar va manbalar
2 ta iqtibos0 ta foydalanilgan manba