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Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm

Adrian DominguezInstitute for Applied Microelectronics, University of de Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, SpainPedro P. CarballoInstitute for Applied Microelectronics, University of de Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, SpainAntonio NúñezInstitute for Applied Microelectronics, University of de Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain

2017en

ABI

Annotatsiya

This paper describes the work done to design a SoC platform for real-time on-line pattern search in TCP packets for Deep Packet Inspection (DPI) applications. The platform is based on a Xilinx Zynq programmable SoC and includes an accelerator that implements a pattern search engine that extends the original Boyer-Moore algorithm with timing and logical rules, that produces a very complex set of rules. Also, the platform implements different modes of operation, including SIMD and MISD parallelism, which can be configured on-line. The platform is scalable depending of the analysis requirement up to 8 Gbps. High-Level synthesis and platform based design methodologies have been used to reduce the time to market of the completed system.

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Identifikatorlar

DOI: 10.1109/recosoc.2017.8016159

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