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Channel-Hot-Carrier Degradation and Bias Temperature Instabilities in CMOS Inverters

J. Martín-MartínezDepartment of Electronic Engineering, Universitat Autònoma Barcelona, Barcelona, SpainSimone GerardinDepartment of Information Engineering (DEI), University of Padova, Padova, ItalyE. AmatDepartment of Electronic Engineering, Universitat Autònoma Barcelona, Barcelona, SpainR. Rodrı́guezDepartment of Electronic Engineering, Universitat Autònoma Barcelona, Barcelona, SpainM. Nafrı́aDepartment of Electronic Engineering, Universitat Autònoma Barcelona, Barcelona, SpainX. AymerichDepartment of Electronic Engineering, Universitat Autònoma Barcelona, Barcelona, SpainA. PaccagnellaDepartment of Information Engineering (DEI), University of Padova, Padova, ItalyG. Ghidini

2009en

ABI

Annotatsiya

The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed. Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are identified as aging mechanisms, and their implications at the device and circuit levels are discussed. Device- and circuit-level results have been linked using the BSIM4 SPICE model.

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DOI: 10.1109/ted.2009.2026206

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