Evaluation Of The Cryptographic Strength Of The Aaoosha128 Algorithm Using Cryptanalysis Methods And Its Comparison With Existing Algorithms
Abstract
This article describes the AAOOSHA128 (Flow Encryption Algorithm, Easy to Implement on Hardware) flow symmetric encryption algorithm, based on three shift registers with a total length of 128 bits, designed for effective hardware application. The degree of randomness of the sequences developed in the study was assessed using statistical tests, and the algorithm's tolerance to certain cryptanalysis methods was analyzed. Also, the number of elements necessary for the hardware implementation of the algorithm was determined, and its hardware performance indicators were calculated. The results show that the proposed algorithm is convenient for IoT devices, and its functionality was practically tested in the Proteus environment. The research results substantiate the possibility of applying this algorithm in environments with limited resources, in particular in IoT systems. Based on this, AAOOSHA128 is considered a promising solution for organizing a secure communication channel on IoT sensors and microcontroller platforms, as well as performing flow encryption tasks in systems with energy and memory constraints. The scientific novelty of the research lies in its simplification of the algorithm's architecture, evaluation by the NIST test, provision of a stable key flow, and clear demonstration of the balance between hardware resources and security.