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Impact of SiGe layer thickness in starting substrates on strained Ge-on-insulator pMOSFETs fabricated by Ge condensation method

Kwang-Won JoDepartment of Electrical Engineering and Information Systems, University of Tokyo , 2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8656, JapanWu-Kang KimDepartment of Electrical Engineering and Information Systems, University of Tokyo , 2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8656, JapanMitsuru TakenakaDepartment of Electrical Engineering and Information Systems, University of Tokyo , 2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8656, JapanShinichi TakagiDepartment of Electrical Engineering and Information Systems, University of Tokyo , 2-11-16 Yayoi, Bunkyo-ku, Tokyo 113-8656, Japan
2019en
ABI

Аннотация

We study the impact of the SiGe thickness in starting substrates composed of Si/Si0.25Ge0.75/SOI(100) structures for the Ge condensation process on the resulting Ge-on-insulator (GOI) film properties. We evaluate the physical properties of the GOI films using AFM and Raman spectroscopy. It is found that 10-nm-thick GOI films with higher compressive strain (εc = 1.75%) and more uniform spatial strain distribution are obtained for 40 nm-thick-Si0.75Ge0.25 through a Ge condensation process with slow cooling than 60 nm-thick-SiGe. This suppression of strain relaxation is due to the lower total strain energy by the thinner SiGe layer. By using this GOI substrate, 10-nm-thick GOI p-channel metal-oxide-semiconductor field effect transistors (pMOSFETs) are demonstrated with the high performance of μh = 467 cm2 V−1 s−1 and Ion/Ioff > 7.2 × 105. The effective hole mobility of the 10 nm-thick GOI pMOSFET increases significantly with reducing measurement temperature from 298 K to 100 K, indicating the high contribution of phonon scattering to the mobility.

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