Перейти к основному содержанию
AkademIndex

Продукты

Для разработчиков

AkademBaseОткрытый API экосистемы
Статья

Implementation of the Density Gradient Quantum Corrections for 3-D Simulations of Multigate Nanoscaled Transistors

Antonio J. García‐LoureiroDepartamento de Electrónica y Computación, Universidad de Santiago de Compostela, Santiago de Compostela, SpainNatalia SeoaneDepartamento de Electrónica y Computación, Universidad de Santiago de Compostela, Santiago de Compostela, SpainM. AldegundeCentro de Supercomputación de Galicia, Galicia, SpainR. ValínDepartamento de Electrónica y Computación, Universidad de Santiago de Compostela, Santiago de Compostela, SpainAsen AsenovDevice Modeling Group, Department Electronics and Electrical Engineering, University of Glasgow, Glasgow, UKA. Martı́nezDevice Modeling Group, Department Electronics and Electrical Engineering, University of Glasgow, Glasgow, UKK. KálnaCollege of Engineering, Swansea University, Swansea, UK
2011en
ABI

Аннотация

An efficient implementation of the density-gradient (DG) approach for the finite element and finite difference methods and its application in drift-diffusion (D-D) simulations is described in detail. The new, second-order differential (SOD) scheme is compatible with relatively coarse grids even for large density variations thus applicable to device simulations with complex 3-D geometries. Test simulations of a 1-D metal-oxide semiconductor diode demonstrate that the DG approach discretized using our SOD scheme can be accurately calibrated against Schrödinger-Poisson calculations exhibiting lower discretization error than the previous schemes when using coarse grids and the same results for very fine meshes. 3-D test D-D simulations using the finite element method are performed on two devices: a 10 nm gate length double gate metal-oxide-semiconductor field-effect transistor (MOSFET) and a 40 nm gate length Tri-Gate fin field-effect transistor (FinFET). In 3-D D-D simulations, the SOD scheme is able to converge to physical solutions at high voltages even if the previous schemes fail when using the same mesh and equivalent conditions. The quantum corrected D-D simulations using the SOD scheme also converge with an atomistic mesh used for the 10 nm double gate MOSFET saving computational resources and can be accurately calibrated against the results from non-equilibrium Green's functions approach. Finally, the simulated I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> -V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> characteristics for the 40 nm gate length Tri-Gate are in an excellent agreement with experimental data.

Перевод пока недоступен

Идентификаторы

Цитирования и источники

Цитирований: 6Использованных источников: 0