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Reduction of plasma-induced damage in n-type GaN by multistep-bias etching in inductively coupled plasma reactive ion etching

Shinji YamadaNagoya University, Nagoya, Aichi 464-8601, JapanMasato OmoriNagoya University, Nagoya, Aichi 464-8601, JapanHideki SakuraiNagoya University, Nagoya, Aichi 464-8601, JapanYamato OsadaULVAC, Inc., Chigasaki, Kanagawa 253-8543, JapanRyuichiro KamimuraULVAC, Inc., Chigasaki, Kanagawa 253-8543, JapanTamotsu HashizumeHokkaido University, Sapporo, Hokkaido 060-0813, JapanJun SudaNagoya University, Nagoya, Aichi 464-8601, JapanTetsu KachiNagoya University, Nagoya, Aichi 464-8601, Japan
2019en
ABI

Аннотация

Plasma-induced damage was reduced by multistep-bias etching that involved a stepwise decrease of the etching bias power (Pbias) and subsequent annealing. The depth of damage at Pbias = 60 W was determined to be 60 nm from the capacitance–voltage characteristics of Ni/Al2O3/etched-GaN metal-oxide-semiconductor diodes. The damaged layer was removed by subsequent etching at Pbias = 5 W and 2.5 W. The residual and shallow damage induced by the low Pbias was then recovered by subsequent annealing at 400 °C. The multistep-bias etching of inductively coupled plasma reactive ion etching was thus confirmed to be effective for achieving a high etching rate with low damage.

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