V.R. Vivek

1 та иш

Department of Electronics and Communication Engineering Prince Shri Venkateshwara Padmavathy Engineering College, Chennai, TamilNadu, India

1. Approximate Multiplier based on Low power and reduced latency with Modified LSB design

   K.K. Senthil Kumar, R. Vignesh, V.R. Vivek +3

   МақолаLow-power high-performance VLSI designE3S Web of Conferences20230 иқтибос

   ABIABI:AkademIndex/openalex/2023.article.001892