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Ish: Comparative performance analysis the Aho-Corasick algorithm for developing a network detection system

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Scalable, high-throughput and modular hardware-based string matching algorithm
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String alignment pre-detection using unique subsequences for FPGA-based network intrusion detection
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A new approach to text searching
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A memory-efficient pipelined implementation of the aho-corasick string-matching algorithm
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Fast Pattern Matching in Strings
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Practical fast searching in strings
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Multi-character cost-effective and high throughput architecture for content scanning
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Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPS
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Variable Length Pattern Matching for Hardware Network Intrusion Detection System
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An efficient multicharacter transition string-matching engine based on the aho-corasick algorithm
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Efficient Pattern Matching Algorithm for Memory Architecture
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Traffic-Aware Design of a High-Speed FPGA Network Intrusion Detection System
Salvatore Pontarelli, Giuseppe Bianchi, Simone Teofili
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Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching
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A multi-gigabit rate deep packet inspection algorithm using TCAM
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Deep packet inspection using parallel Bloom filters
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A Memory-Efficient Bit-Split Parallel String Matching Using Pattern Dividing for Intrusion Detection Systems
Hyunjin Kim, Hong‐Sik Kim, Sungho Kang
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Multi-Stride String Searching for High-Speed Content Inspection
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Deterministic memory-efficient string matching algorithms for intrusion detection
Nathan Tuck, Timothy Sherwood, Brad Calder +1
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A fast string searching algorithm
Robert S. Boyer, J Strother Moore
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Multi-pattern signature matching for hardware network intrusion detection systems
Haoyu Song, John W. Lockwood
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A Pipelined Non-Deterministic Finite Automaton-Based String Matching Scheme Using Merged State Transitions in an FPGA
HyunJin Kim, Kang-Il Choi
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SCADIS: A Scalable Accelerator for Data-Intensive String Set Matching on FPGAs
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B07: Aho-Corasick algorithm implementation in hardware for network intrusion detection
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Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm
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