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27 ta ish

Ish: Synthesis of built-in control circuits for combinational digital devices based on Boolean signals correction using polynomial codes

  1. Self-dual parity checking-A new method for on-line testing

    V.V. Saposhnikov, А. Л. Дмитриев, M. Goessel +1

    Maqola200212 iqtibos
    ABI
  2. A note on error detection codes for asymmetric channels

    J. M. Berger

    Maqola196110 iqtibos
    ABI
  3. Self‐checking Synchronous FSM Network Design with Low Overhead

    A. Matrosova, Ilya Levin, S. Ostanin

    Maqola19998 iqtibos
    ABI
  4. Error Detecting and Error Correcting Codes

    R. W. Hamming

    Maqola19507 iqtibos
    ABI
  5. Sequential circuit design using synthesis and optimization

    Ellen Sentovich, K.J. Singh, Cho W. Moon +3

    Maqola20036 iqtibos
    ABI
  6. Optimal error detection codes for completely asymmetric binary channels

    C. Freiman

    Maqola19625 iqtibos
    ABI
  7. Channel Codes

    W.E. Ryan, Shu Lin

    Kitob20093 iqtibos
    ABI
  8. Optimal asymmetric error detecting codes

    J. Martin Borden

    Maqola19823 iqtibos
    ABI
  9. Scheme for periodical concurrent fault detection in parallel CRC circuits

    Jie Li, Shanshan Liu, Pedro Reviriego +2

    Maqola20192 iqtibos
    ABI