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Ish: Investigation of Ways of Synthesizing Concurrent Error-Detection Circuits Based on Boolean Signal Correction Using Uniform Separable Codes
Self-dual parity checking-A new method for on-line testing
V.V. Saposhnikov, А. Л. Дмитриев, M. Goessel +1
Maqola200212 iqtibosABIHidden Fault Analysis of FPGA Projects for Critical Applications
Oleksandr Drozd, Ihor Perebeinos, Oleksandr Martynyuk +3
Maqola20208 iqtibosABIChecking Combinational Circuits by the Method of Logic Complement
M. Goessel, Alexandre V. Morozov, Vladimir Sapozhnikov +1
Maqola20054 iqtibosABINew self-checking circuits by use of Berger-codes
Alexandre V. Morozov, V.V. Saposhnikov, V.V. Saposhnikov +1
Maqola20023 iqtibosABIWhich concurrent error detection scheme to choose ?
Subhasish Mitra, E.J. McCluskey
Maqola20023 iqtibosABIParity driven reconfigurable duplex system
Jaroslav Borecký, Martin Kohlík, Hana Kubátová
Maqola20173 iqtibosABI