P. Prinetto

1 ta ish

Polytechnic University of Turin

1. Fault tolerant and BIST design of a FIFO cell

   Fulvio Corno, P. Prinetto, M. Sonza Reorda

   MaqolaVLSI and Analog Circuit TestingPORTO Publications Open Repository TOrino (Politecnico di Torino)19960 iqtibos

   ABIABI:AkademIndex/openalex/1996.article.000062