M. Sonza Reorda

4 ta ish

Politecnico di Torino, Dipartimento di Automatica e, Informatica, Torino, Italy#TAB#

1. Fault tolerant and BIST design of a FIFO cell

   Fulvio Corno, P. Prinetto, M. Sonza Reorda

   MaqolaVLSI and Analog Circuit TestingPORTO Publications Open Repository TOrino (Politecnico di Torino)19960 iqtibos

   ABIABI:AkademIndex/openalex/1996.article.000062

2. An integrated HW and SW fault injection environment for real-time systems

   Alfredo Benso, Maurizio Rebaudengo, M. Sonza Reorda +1

   MaqolaRadiation Effects in Electronics20020 iqtibos

   ABIABI:AkademIndex/openalex/2002.article.000053

3. Design Validation of Multithreaded Processors Using Threads Evolution

   D. Ravotto, Ernesto Sánchez, M. Sonza Reorda +1

   MaqolaEmbedded Systems Design TechniquesJournal of Integrated Circuits and Systems20100 iqtibos

   ABIABI:AkademIndex/openalex/2010.article.000457

4. A Novel Compaction Approach for SBST Test Programs

   Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, M. Sonza Reorda

   PreprintVLSI and Analog Circuit Testing20210 iqtibos

   ABIABI:AkademIndex/openalex/2021.preprint.000127